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(Hex) opc 1 4 EF Example: Given: The carry flag = "0": CCF If the carry flag = "0", the CCF instruction complements it in the FLAGS register (0D5H), changing its value from logic zero to logic one. SAM88RCRI INSTRUCTION SET S3C9442/C9444/F9444/C9452/C9454/F9454 CLR — Clear CLR dst Operation: dst . "0" The destination location is cleared to "0". Flags: No flags are affected. Format: Bytes Cycles Opcode Addr Mode (Hex) dst opc dst 2 4 B0 R 4 B1 IR Examples: Given: Register 00H = 4FH, register 01H = 02H, and register 02H = 5EH: CLR 00H . Register 00H = 00H CLR @01H . Register 01H = 02H, register 02H = 00H In Register (R) addressing mode, the statement "CLR 00H" clears the destination register 00H value to 00H. In the second example, the statement "CLR @01H" uses Indirect Register (IR) addressing mode to clear the 02H register value to 00H. S3C9442/C9444/F9444/C9452/C9454/F9454 SAM88RCRI INSTRUCTION SET COM — Complement COM dst Operation: dst . NOT dst The contents of the destination location are complemented (one's complement); all "1s" are changed to "0s", and vice-versa. Flags: C: Unaffected. Z: Set if the result is "0"; cleared otherwise. S: Set if the result bit 7 is set; cleared otherwise. V: Always reset to "0". Format: Bytes Cycles Opcode Addr Mode (Hex) dst opc dst 2460 R 4 61 IR Examples: Given: R1 = 07H and register 07H = 0F1H: COM R1 . R1 = 0F8H COM @R1 . R1 = 07H, register 07H = 0EH In the first example, destination working register R1 contains the value 07H (00000111B). The statement "COM R1" complements all the bits in R1: all logic ones are changed to logic zeros, and vice-versa, leaving the value 0F8H (11111000B). In the second example 更多：https://www.bmcx.com/ , Indirect Register (IR) addressing mode is used to complement the value of destination register 07H (11110001B), leaving the new value 0EH (00001110B). SAM88RCRI INSTRUCTION SET S3C9442/C9444/F9444/C9452/C9454/F9454 CP — Compare CP dst,src Operation: dst – src The source operand is compared to (subtracted from) the destination operand, and the appropriate flags are set accordingly. The contents of both operands are unaffected by the comparison. Flags: C: Set if a "borrow" occurred (src > dst); cleared otherwise. Z: Set if the result is "0"; cleared otherwise. S: Set if the result is negative; cleared otherwise. V: Set if arithmetic overflow occurred, that is, if the operands were of opposite signs and the sign of the result is of the same as the sign of the source operand; cleared otherwise. Format: Bytes Cycles Opcode Addr Mode (Hex) dst src opc dst | src 2 4 A2rr 6 A3 rlr opc src dst 3 6 A4RR 6 A5 RIR opc dst src 3 6 A6 RIM Examples: 1. Given: R1 = 02H and R2 = 03H: CP R1,R2 . Set the C and S flags Destination working register R1 contains the value 02H and source register R2 contains the value 03H. The statement "CP R1,R2" subtracts the R2 value (source/subtrahend) from the R1 value (destination/minuend). Because a "borrow" occurs and the difference is negative, C and S are "1". 2. Given: R1 = 05H and R2 = 0AH: CP R1,R2 JP UGE,SKIP INC R1 SKIP LD R3,R1